VHDL Ref: La Referencia de Sintaxis Esencial para Diseñadores de FPGA y ASIC

A quick reference manual for the two most popular Hardware Description Languages (HDL): VHDL and Verilog. This app is written by engineers, for engineers. For every construct in VHDL, provides the equivalent in Verilog, and vice-versa. Experienced custom digital logic designer for FPGA or ASIC? Electrical engineering student just learning the ropes? This app is for you. + Searchable dictionary of every keyword, operator, and data type for both languages. + Handbook provides simple example for every single reference + Common functions in each language + All pre-defined attributes for VHDL + All primitive gates and drive strengths for Verilog + Filter by language (VHDL, Verilog, or both) + Filter by language elements (keywords, operators, attributes, data types, etc.)